Markets 10 September 2026 12 min read

9,800 EFLOPS by 2030 Against 2,185 Today (September 2026): China Wrote the 100,000-Card Cluster Into a Five-Year Plan — and the Binding Constraint Is Memory, Not Design

China's five-year plan targets 9,800 EFLOPS by 2030 from 2,185 today, and JD Cloud announced a 100,000-card domestic-GPU cluster a day later. The mechanism.

9,800 EFLOPS by 2030 Against 2,185 Today (September 2026): China Wrote the 100,000-Card Cluster Into a Five-Year Plan — and the Binding Constraint Is Memory, Not Design
Photo by Radiotrefoil, CC BY-SA 4.0, via Wikimedia Commons.

9,800 EFLOPS by 2030 Against 2,185 Today (September 2026): China Wrote the 100,000-Card Cluster Into a Five-Year Plan — and the Binding Constraint Is Memory, Not Design

On Monday 8 September 2026 China's Ministry of Industry and Information Technology published its five-year plan for the information and communications industry, and among its 13 key indicators is intelligent computing power of 9,800 EFLOPS by 2030 — against 2,185 EFLOPS at the end of June this year. The plan also asks, in its own language, for the orderly deployment of computing clusters of 10,000 accelerator cards and of those using 100,000 or more. On Tuesday, JD Cloud announced one. The interesting question is not whether Beijing wants a 100,000-card domestic cluster; the document says it does. It is which physical input decides whether the cluster arrives — and on the published evidence that input is memory, not chip design.

Key takeaways
  • The target is a 4.5x. MIIT's plan sets 9,800 EFLOPS of intelligent computing power by 2030. The spokesperson's own baseline, given on 20 July, was 2,185 EFLOPS at end-June 2026, up 177% year on year. The gap is a multiple of about 4.5 in four and a half years.
  • The installed base is already large. As of the plan's release China had 52 intelligent computing facilities each equipped with more than 10,000 accelerator cards — on the order of 520,000 cards before this week's announcement.
  • The announcement is an intention, not a machine. JD Cloud's 100,000-GPU Moore Threads cluster, unveiled 9 September, carries no delivery date, no cost, no named accelerator model and no acceptance milestone.
  • The vendor's own datasheet stops an order of magnitude short. Every published Moore Threads scaling claim for its flagship — 95% cluster linearity, a 0.6% loss deviation, better than 74% of an international flagship's per-card training performance — is scoped to a 10,000-GPU cluster, not 100,000.
  • Memory is where the constraint binds. US controls on high-bandwidth memory and its packaging equipment were expanded in December 2024. China's ChangXin Memory only began small-scale HBM3E production around the start of September 2026 and is targeting a ramp next year.
  • Nvidia's numbers already assume zero. The 26 August guide of $108.0bn for the October quarter states outright that no Data Center compute revenue from China is assumed — so this story reaches the share price through terminal market structure, not through the next print.
  • See how the growth, rate and risk factors are scoring the eight majors right now on the live meter.

What actually happened, in two days

The sequence matters more than either item alone. On 8 September the Ministry of Industry and Information Technology issued its development plan for the information and communications industry across the 15th Five-Year Plan period, 2026 to 2030. Xinhua's summary of the document lists 13 key indicators: industry revenue of 4.1 trillion yuan (about US$604.8 billion) by 2030, cumulative information-infrastructure investment of 3.8 trillion yuan, average annual growth of 7% in total telecommunications business volume, 50 5G base stations per 10,000 people, 95% 5G user penetration — and intelligent computing power of 9,800 EFLOPS. Twenty-six key tasks sit underneath, including starting 6G commercial services at an appropriate time and building a nationwide integrated computing-power network.

Buried in the cluster language is the line the chip industry read first. The South China Morning Post reported that the plan calls for the orderly deployment of intelligent computing clusters with 10,000 graphics processing cards or those using 100,000 or more cards, and noted that China had already constructed 52 intelligent computing facilities each equipped with more than 10,000 accelerator cards.

The next day, at JD's 2026 Global Technology Explorers Conference, JD Cloud said it would build a cluster of 100,000 general-purpose GPUs supplied by Moore Threads. Moore Threads said in its own statement that it would be the first time domestically developed GPUs are used in a 100,000-card core computing cluster at a leading Chinese AI cloud provider. The workloads named were large-model training and inference, embodied intelligence and supply-chain AI; the capacity is to be rented out to third parties in the same way JD already sells cloud built on Nvidia hardware. The two firms have already run a 10,000-GPU cluster together, so this is a scale-up of a tested partnership rather than a cold start.

What was not in the announcementNo delivery timetable. No capital cost. No named accelerator model. No acceptance or benchmark milestone. A 100,000-card cluster is a multi-year construction project with power, cooling, networking and memory procurement all on its critical path — and none of those were quantified. Read the announcement as a statement of intent that is consistent with a policy document published the day before, which is a different and much weaker claim than a machine that exists.

The arithmetic: 520,000 cards, a 4.5x, and a unit with no precision attached

Start with the national numbers, because they frame everything else. MIIT spokesperson Xie Cun told a 20 July 2026 press conference on first-half industrial development that intelligent computing capacity had reached 2,185 EFLOPS by the end of June, up 177% year on year. The plan's 9,800 target is therefore about 4.5 times the June 2026 level, to be delivered by 2030.

Set that against the card base. Fifty-two facilities at more than 10,000 cards each puts the floor somewhere above 520,000 accelerator cards. If per-card performance were frozen at today's average, a 4.5x capacity target would imply a fleet on the order of 2.3 million card-equivalents by 2030 — arithmetic, not a forecast. Per-card performance will not be frozen, and that is precisely where the slack in the target lives: a large share of the multiple can be delivered by newer silicon rather than by more buildings.

The numbers, verified Figure Source
Intelligent computing capacity, end-June 2026 2,185 EFLOPS (+177% y/y) MIIT press conference, 20 July 2026
Target, 2030 9,800 EFLOPS MIIT five-year plan, 8 September 2026
Implied multiple ≈4.5x in 4.5 years arithmetic
Facilities with >10,000 cards, at plan release 52 MIIT plan, via SCMP
Cumulative info-infrastructure investment, 2026–30 3.8 trillion yuan (US$532bn) MIIT plan
JD Cloud / Moore Threads cluster 100,000 GPUs, no date given Moore Threads, 9 September 2026
Moore Threads H1 2026 revenue RMB 1.74bn, +147% y/y company interim report
Nvidia Q3 FY2027 guide $108.0bn ±2%, no China DC compute assumed Nvidia, 26 August 2026

Then the unit itself. An EFLOPS is a rate of floating-point operations, and a floating-point operation is not one thing: the same die scores roughly twice as high at FP8 as at FP16 and higher again against FP32. A national capacity total published without a stated precision can therefore move by a factor of two or four on definition alone. This is not an accusation of bad faith — every country's compute statistics have the same problem — but it is the first question to ask of any headline compute number, including the ones in Western capex disclosures. Moore Threads markets its flagship on hardware-native FP8 support, which improves the score and the workload at the same time.

The vendor's own datasheet stops at 10,000 cards

The most useful document in this story is not the policy plan. It is Moore Threads' own product page for the MTT S5000, its flagship accelerator, built on the PH100 chip and the "PingHu" architecture with full-precision support from FP8 to FP64.

Read what the company claims, and read where it stops. The S5000 is described as delivering near-linear scaling from a single GPU to a 10,000-GPU cluster, with cluster linearity of up to 95% at that scale. In core computer-vision and large-language-model training it is claimed at better than 74% of the performance of leading international flagship products. Model FLOPs Utilisation is quoted above 60% on Llama3-70B and above 40% on DeepSeek-236B. In a DeepSeek-236B run on a 10,000-GPU cluster, the loss curve is said to hold a relative precision deviation of 0.6% against clusters running international flagships over the first 30,000 steps.

Every one of those numbers is scoped to ten thousand cards. Neither company has published a scaling claim at a hundred thousand. That is the honest state of the evidence, and it is the gap between a policy target and a working machine: interconnect topology, collective-communication efficiency and failure rates do not scale linearly with card count, which is why the company's own marketing material treats 10,000 as the demonstrated ceiling and quotes its reliability gain at that scale too. On the vendor's own relative-performance figure, 100,000 of its cards is roughly 74,000 international-flagship equivalents — again arithmetic, and again dependent on the workload the 74% was measured on.

The corporate scale tells the same story. Moore Threads listed on Shanghai's STAR Market in December 2025 after an IPO that raised about 8 billion yuan; the shares closed their debut session at 600.5 yuan against a 114.28 yuan offer price. Its interim report for the six months to June 2026 shows revenue of RMB 1.74bn, up about 147% year on year and already above its RMB 1.51bn full-year 2025 total, with research and development of RMB 769m absorbing 44.3% of revenue and a first quarterly net profit of RMB 29m in the March quarter. A company at that revenue run-rate has never shipped anything close to a hundred thousand flagship accelerators in a year. Growing into that order is possible; it has not happened yet.

Where the constraint actually binds

DesignLargely solved on paper — PH100, FP8-native, familiar training stack
Logic wafersDomestic advanced-node capacity, tight but expanding
HBMExport-controlled since Dec 2024; domestic supply at small-scale HBM3E only
Finished cardsVolume set by the scarcest input, not the fastest one

A training accelerator is a memory machine with arithmetic attached. Bandwidth, not raw FLOPS, is what keeps tensor cores fed during a large-model run, which is why every serious training part is built around stacked high-bandwidth memory. It is also the single component the United States moved hardest to restrict, expanding controls on HBM and on the tooling used to fabricate and package it in December 2024.

Domestic substitution has begun, and it is early. Korea JoongAng Daily reported at the start of September 2026 that ChangXin Memory Technologies had begun producing HBM3E for AI accelerators, is targeting Chinese customers and aims to ramp production next year — while still trailing the leading memory makers by a wide margin in its ability to mass-produce it. Small-scale production with a ramp targeted for next year is not the same input as an existing supply line.

That is the mechanism in one line: the card count in an announcement is set by ambition, and the card count that ships is set by memory. It is the same squeeze this site traced through the cheap end of the market when AI data centres started repricing mature-node wafers — scarcity migrating outward from the leading edge into everything that shares a supply chain with it. A second national buildout bidding for stacked memory does not only affect Chinese clusters; it competes for the same finite packaging and DRAM capacity that every hyperscaler's bill of materials depends on.

Rates, growth, risk sentiment and commodities all move the eight majors at once. See where they sit today.Open the live meter →

What it does, and does not do, to the numbers people trade

The instrument this story touches is the US semiconductor complex and the indices it dominates — not a currency pair. Handle it precisely.

Nvidia reported revenue of $96.221bn for the quarter ended 26 July 2026, up 106% year on year, with Data Center revenue of $89.0bn, and guided the October quarter to $108.0bn plus or minus 2%. The release says, in its own words, that the company is not assuming any Data Center compute revenue from China in that outlook. Guidance and price therefore already carry a zero on the China line. News that a Chinese cloud intends to build a domestic cluster cannot subtract from a number that is already zero — which is why the immediate index reaction to announcements like this is usually nothing, and why reading a same-day price move as confirmation or refutation is a category error.

Where it can reach a valuation is the long horizon, and Nvidia's own chief financial officer put that channel on record. Speaking after the January-quarter results, Colette Kress said the company had yet to generate any revenue from the small volume of H200 products approved for China-based customers, adding that "we do not know whether any imports will be allowed into China" — and, on competition, that competitors in China, "bolstered by recent IPOs, are making progress and have the potential to disrupt the structure of the global AI industry over the long-term", as CNBC reported. Moore Threads is one of the listings she was describing. A market temporarily closed by licensing can reopen; a market that has built a working alternative stack does not.

For an index reader the practical translation is narrow. A US500 or NAS100 position is a position in the size of the global AI capital-expenditure cycle and in how much of it lands on US suppliers. This week's news changes neither the near-term cycle nor the reported numbers; what it moves is the probability distribution around the terminal share, several years out, of one geography. That is worth understanding, and it is not a trade — the same distinction drawn in the August quarter breakdown, where a single stock's 8.7% move accounted for most of an index day.

Where this reaches a currency, and where it does not

Honestly: barely, and the barely is worth stating so nobody stretches it. None of the eight currencies the meter scores is a semiconductor proxy. The memory supply chain runs through Korea and Taiwan; the lithography and deposition tooling runs through the Netherlands and Japan. The won and the Taiwan dollar are the currencies with direct exposure, and neither is a major.

Two indirect channels do exist and both are thin. The first is the dollar through growth: AI-related construction and equipment spending has become a visible contributor to US fixed investment, and growth is one of the five factors the meter scores — so anything that changes the medium-term size of that capex cycle eventually shows up there, with a lag measured in quarters, not headlines. The second is the yen through Japan's semiconductor-equipment export exposure, which reaches the trade balance far more than the rate differential that actually drives the pair. Neither channel is readable off a policy document, and treating them as such is how a good macro idea becomes a bad position.

What would change the picture

Four observable things, in rough order of information value. First, an acceptance milestone: a published benchmark, a customer running a training job, or a stated in-service date for the JD Cloud cluster would convert an intention into a machine. Second, the memory ramp — evidence that ChangXin's HBM3E has moved from small-scale to volume, and at what yield, because that number caps everything downstream. Third, MIIT's next capacity print at the half-year press conference, which tells you whether the run-rate toward 9,800 EFLOPS is tracking or slipping, and whether the ministry starts quoting a precision alongside it. Fourth, and most directly readable in a share price: whether Nvidia reinstates a China Data Center assumption in a future outlook, which would mean the licensing channel reopened, or continues to guide from zero, which means the substitution story keeps running unopposed.

Until at least the first two arrive, the correct reading of this week is modest and specific. A government published a target that includes 100,000-card clusters, and a cloud provider announced one the following day using a supplier whose own published scaling evidence stops at 10,000. Both facts are real. Neither is a machine.

Educational macro context only — not investment advice.

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Frequently asked

What did China's new five-year plan say about AI computing power?
The Ministry of Industry and Information Technology published its development plan for the information and communications industry covering the 15th Five-Year Plan period, 2026 to 2030, on 8 September 2026. It sets 13 key indicators, of which the one the chip industry reads is intelligent computing power of 9,800 EFLOPS by 2030. The same document targets industry revenue of 4.1 trillion yuan (about US$604.8 billion) by 2030 and cumulative information-infrastructure investment of 3.8 trillion yuan (about US$532 billion) over the five years, along with 50 5G base stations per 10,000 people and 95% 5G user penetration. On clusters specifically, the plan calls for the orderly deployment of intelligent computing clusters of 10,000 accelerator cards, and of those using 100,000 or more cards. The starting point matters as much as the target: MIIT spokesperson Xie Cun said at a 20 July 2026 press conference that China's intelligent computing capacity had reached 2,185 EFLOPS at the end of June, up 177% year on year. Getting from 2,185 to 9,800 is a multiple of about 4.5 in four and a half years.
What is the JD Cloud and Moore Threads 100,000-GPU cluster?
On 9 September 2026, at JD's 2026 Global Technology Explorers Conference, JD Cloud said it would build a computing cluster of 100,000 general-purpose GPUs supplied by Moore Threads, the Shanghai-listed Chinese GPU designer founded in 2020. Moore Threads said in its own announcement that it would be the first time domestically developed GPUs are used in a 100,000-card core computing cluster at a leading Chinese AI cloud provider. The two companies have already run a 10,000-GPU cluster together, and JD Cloud intends to rent the capacity to outside companies the way it already sells cloud capacity built on Nvidia hardware. What the announcement did not contain is as informative as what it did: no delivery timetable, no cost, no named accelerator model, and no acceptance milestone. It is a stated intention to build, not a machine that exists.
Does a domestic Chinese GPU cluster hurt Nvidia's revenue?
Not in the near-term numbers, because those numbers already assume zero. Nvidia's outlook for the third quarter of fiscal 2027, issued on 26 August 2026 alongside revenue of $96.2 billion and Data Center revenue of $89.0 billion, guides to $108.0 billion plus or minus 2% and states in the release itself that the company is not assuming any Data Center compute revenue from China. A market that has already marked a line to zero cannot be surprised downward by news from that line. The channel this news actually runs through is longer-dated and structural — whether a domestic alternative stack becomes good enough that the China market is permanently gone rather than temporarily closed. Nvidia's own chief financial officer, Colette Kress, framed it that way in February 2026, saying competitors in China, bolstered by recent IPOs, are making progress and have the potential to disrupt the structure of the global AI industry over the long term.
Why is memory the bottleneck for Chinese AI chips rather than the processor?
Because a training accelerator is only as fast as the memory feeding it, and stacked high-bandwidth memory is the part of the supply chain where China is furthest behind and where export controls bite hardest. The United States expanded controls on HBM and on the equipment used to make and package it in December 2024. Domestic substitution has started but is early: ChangXin Memory Technologies began small-scale HBM3E production for AI accelerators around the turn of September 2026, is targeting Chinese customers, and aims to ramp next year — while still trailing the leading memory makers by a wide margin in mass-production capability. Logic design is the part China has largely solved on paper; memory supply is the part that decides how many finished cards can actually be shipped in a year. That is why the card count in an announcement is a weaker signal than the memory volume behind it.
Why is an EFLOPS target an ambiguous number?
Because a floating-point operation is not one thing. The same silicon scores roughly twice as high at FP8 as at FP16, and higher again against FP32, so a national capacity figure quoted without a stated precision can move by a factor of two or four on definition alone. MIIT's headline figures — 2,185 EFLOPS at end-June 2026, 9,800 EFLOPS by 2030 — are published as capacity totals rather than as precision-qualified benchmarks. That does not make them wrong, but it does mean the target can be partly met by newer cards that are natively faster at lower precision rather than by more cards in more buildings. Moore Threads' own flagship, the MTT S5000, is marketed on hardware-native FP8 support for exactly this reason. When you read a compute target, read the precision alongside it, or read nothing at all.
PT
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